Author Topic: Major micronucleus size reduction, bringing it below 2.0k goal  (Read 10413 times)

CBcracker

  • Jr. Member
  • **
  • Posts: 80
Re: Major micronucleus size reduction, bringing it below 2.0k goal
« Reply #15 on: August 12, 2013, 09:52:14 am »
I'm not sure it's in the ATtiny85 datasheet.  It's a property of flash memory that I've seen in the past, and probably just tried on the AVR without checking for confirmation in the datasheet.  Here's some info from Wikipedia:
http://en.wikipedia.org/wiki/Flash_memory#Block_erasure

I don't think there's a limit to number of writes per erase.  I guess you could say the limit is when everything is set to 0's. :-)
OK, I think I understand.  The code doesn't actually write the same bytes in page 0 multiple times, it writes the boot vector and usb pin change vector while leaving the rest of the page reset to 0xff.  Then it writes the rest later on, without touching the boot vector.  Pretty cool - self-modifying code on a harvard architecture CPU.  Not quite like self-modifying 65xx code, but getting there...

Embedded-Creations

  • Newbie
  • *
  • Posts: 9
Re: Major micronucleus size reduction, bringing it below 2.0k goal
« Reply #16 on: August 12, 2013, 10:05:29 am »
Quote
The code doesn't actually write the same bytes in page 0 multiple times, it writes the boot vector and usb pin change vector while leaving the rest of the page reset to 0xff.  Then it writes the rest later on, without touching the boot vector.


That's true, though if there was some reason to write 0's to the same byte in multiple phases, it could do that as well.  I've done that with other applications, though I can't see a need to with this one.