Author Topic: a smaller, cost-reduced digispark (<$1)  (Read 28371 times)

gogol

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #15 on: July 23, 2013, 10:22:02 am »
@CBcracker: looks like you are on the right path:

Out of the 650 page USB 2.0 reference:
http://www.usb.org/developers/docs/usb_20_070113.zip

6.4.3
...
Low-speed drivers are characterized for operation over a range of capacitive loads. This value
includes all sources of capacitance on the D+ and D-lines, not just the cable. Cable selection must
insure that total load capacitance falls between specified minimum and maximum values. If the
desired implementation does not meet the minimum requirement, additional capacitance needs to be
added to the device. Refer to Section 7.1.1.2 for details.

7.1.1.2
A low-speed device must have a captive cable with the Series A connector on the plug end. The combination of
the cable and the device must have a single-ended capacitance of no less than 200 pF and no more than 450 pF
on the D+ or D- lines.

7.1.6.1
For full-speed devices with captive cables, the device itself may have up to 75 pF of lumped capacitance to
ground on D+ and D-. The cable accounts for the remainder of the input capacitance
.....
An implementation may use small capacitors at the transceiver for purposes of edge rate control. The sum of the
capacitance of the added capacitor (CEDGE), the transceiver, and the trace connecting capacitor and transceiver to
RS must not exceed 75 pF (either single-ended or differential) and the capacitance must be balanced to within
10%. The added capacitor, if present, must be placed between the transceiver pins and RS (see Figure 7-22).








CBcracker

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #16 on: July 23, 2013, 03:21:08 pm »
@CBcracker: looks like you are on the right path:

Out of the 650 page USB 2.0 reference:
http://www.usb.org/developers/docs/usb_20_070113.zip

7.1.1.2
A low-speed device must have a captive cable with the Series A connector on the plug end. The combination of
the cable and the device must have a single-ended capacitance of no less than 200 pF and no more than 450 pF
on the D+ or D- lines.

Thanks for checking.  I downloaded the reference a couple weeks ago, but it's length is beyond my attention span. :-)
I think I'll go with 220pF.

Bluebie

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #17 on: July 23, 2013, 07:13:00 pm »
V-USB does mention the use of capacitors, but please keep in mind that the digispark (the attiny85 specifically) does not have a hardware USB interface, and the software emulation layer is not and can not ever be compliant with the USB spec as far as I can make out. Advice in the spec applies to devices where other parts of the circuit are compliant with other parts of the spec. Here's what the capacitors do: By absorbing some energy after the resistor, they create a low pass filter on incoming signals. This low pass filter has two effects - it reduces or eliminates ringing on the line, and it delays the data by some amount of time. You may like to consider that because timing is such a hard issue with V-USB devices that the timing used in V-USB maybe less than a real USB device.


The digispark implements the circuit schematic recommended by the V-USB developers, which they suggest to be the most universally reliable while remaining compatible with 5v. I would not suggest deviating from their recommendations, especially where it adds more components, complexity, and cost!

gogol

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #18 on: July 24, 2013, 12:30:22 am »
parallel to this discussion i see another idea, how to deal with the advantages/disadvantages of the virtual USB solution.

What about a slightly different PCB-layout for any upcoming next generation of v-usb powered spark:


PCB arranged in two parts

+------------+ +-----+
|°   ° ° °   +-+     +-------+
|°            |° U     ======|
|°            |° S      =====|
|° attiny     |° B      =====|
|°            |°       ======|
|°           +-+     +-------+
+------------+ +-----+


If all USB-parts like resistors, zeners, safety-diode, ... are placed immediately behind the plug, there can be the second part with the attiny divided with two small incisions between those the pcb can be cutted in two parts.
When the USB part than has still lands for soldering headers you have different possibilities:
  • You can use it, like today, fully USB capable, but two pins are restricted in their usage
  • You can cut the device in two parts and use the USB-part as a kind of programmer, connecting it to the attiny-part, whenever you plan to reprogram
That way you could have a solution for both scenarios within one single production for only a slightly higher PCB cost.
Perhaps the LED from PB1 would go as well to the USB side of the crack, (which means, that there needs to go a 5th pad in my sketch as well on that side)
That way there is a simple solution for all problems when projects are running in limitation with pins.

We have only 6 pins, and 4 of them are somehow restricted:
  • The PB5 ( reset) has a weak drive with a high-level voltage between 2.5 and 3V (thats part of atmels design and can't be changed)
  • PB0 or PB1 have the LED connected, which will interfere with several use cases as well
  • PB3 has the pullup and a zener connected, which renders analogRead unusable and interferes with other use cases
  • PB4 has the zener connected, which allows analogRead only the input-range from 0-3.5 Volt and interferes with other use cases as well


Regards

 .g

CBcracker

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #19 on: July 24, 2013, 07:31:08 am »
The digispark implements the circuit schematic recommended by the V-USB developers, which they suggest to be the most universally reliable while remaining compatible with 5v. I would not suggest deviating from their recommendations, especially where it adds more components, complexity, and cost!

I haven't seen postings from anyone who has hooked the data lines up to a scope to see what they look like.  With the digispark being plugged directly into the host USB port there is no cable capacitance, and with no capacitors on the board the ringing is going to be significant.  I'd bet that when going low the voltage drops below -1v.  Going high it will likely go over 6v, then drop once the 3.6v zener starts to conduct, swing down to ~3v, until it stabilizes around 3.6.

A 220pF capacitor is ~1c, even in low volume.  It should reduce complexity in the sense a cleaner signal is simpler to process.

As I mentioned in an earlier post, I'm keeping the 1.5K pullup resistor.  It wouldn't work anyway - after you mentioned it, I checked the datasheet (table 21-1, pg 162).  Rpu = 20-50KOhm, which is way to high to be able to pull the line up over 3v when there's a 15K pulldown resistor on the other side.

Besides adding the capacitors, the other hardware change I'd suggest is moving the data lines to pins 5 & 6, with D+ on pin 6 (PB0).  With that change it's possible to read a bit and do NRZI decode in only 4 cycles:
 in    x1, USBIN    ; D+ -> x1[0]
 eor    x1, x2        ; NRZI decode
 ror    x1        ; x1[0] -> C
 ror    shift        ; C -> shift[7]
 in    x2, USBIN    ; D+ -> bit 0 of x2
 eor    x2, x1        ; NRZI decode
 ror    x2        ; x2[0] -> C
 ror    shift        ; C -> shift[7]

With an extra cycle per bit, there's enough time to do unstuffing.  I plan to do end-of-packet detection when there's a bitstuffing error, like it's done in high-speed USB (instead of se0 detection).
I have written some draft code that should be able to work at 8Mhz; at that speed there's 16 cycles for every 3 bits of USB data.  My code only needs 28 cycles to receive 6 bits, so I had to put in a few nops.  At this point it's only on the back of an envelope (literally), and I have yet to even download AVR studio.  Before the summer is over, I hope to have something working.

CBcracker

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #20 on: July 24, 2013, 07:46:17 am »
My suggestion would solve these three problems:
  • PB0 or PB1 have the LED connected, which will interfere with several use cases as well
  • PB3 has the pullup and a zener connected, which renders analogRead unusable and interferes with other use cases
  • PB4 has the zener connected, which allows analogRead only the input-range from 0-3.5 Volt and interferes with other use cases as well

The red LED would be connected in series with Vcc, so it wouldn't interfere with any of the data pins.  The 5v pullup would draw from Vbus before the LED, so when disconnected from the USB port and powered by another source there would be no voltage on the pin used for USB D-.
Vbus -----+---->---Vcc
               R
By dropping Vcc to ~3.5v, the zeners can be left out.
The capacitors to limit clock slew should have no impact as they would be filtering high-frequency signals that are too fast for the MCU to detect.


defragster

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #21 on: August 05, 2013, 03:49:37 am »
I got one of the programmer 'switch' units to minimize wear and tear. 'Ideally' some non-runtime parts could be migrated this way to reduce the per unit load (mA & $).  This thread was old but that is how I read what Mark wrote: http://digistump.com/board/index.php/topic,188.msg2922.html#msg2922  And also "This design may allow the use of thinner PCB's rather than the thick version required for the USB connection, and removes the need for gold ..."
Lower parts/power cost refinement would be great - perhaps only to allow room for other 'Pro' improvements.  A more capable main board means fewer shields/expanders - and more 'networking' options when needed.
I ordered two Sparks and two DigiX units - but also two NANO {[font=]SainSmart V3 ATMEGA328[/font]} w/USB cable for $13.99 delivered China direct - and +$3 each for two MEGA2560 R3. 

Mark

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #22 on: August 05, 2013, 04:22:03 am »
Quote
that is how I read what Mark wrote
yep that's the way I intended.
one of the other advantages was it releases the full potential of the two pins as well.


mark

CBcracker

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #23 on: August 05, 2013, 09:35:41 am »

I ordered two Sparks and two DigiX units - but also two NANO {[font=]SainSmart V3 ATMEGA328[/font]} w/USB cable for $13.99 delivered China direct - and +$3 each for two MEGA2560 R3.

Fasttech has a 328P "pro mini" for ~$5.  They're also selling on aliexpress for only $3.50:
http://www.aliexpress.com/item/5pcs-lot-Pro-Mini-328-Mini-ATMEGA328-5V-16MHz-Free-Shipping-Dropshipping/714840800.html

defragster

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #24 on: August 05, 2013, 01:20:58 pm »
Will be interesting to see how 'Spark' refinement works out. 
Those Lots of 5 for $17.50 are ridiculous for a complete 'Atmel Atmega328P-AU' system when I paid $14 each like a sucker.  It shows the group at $3.50 each - and includes free shipping from China?

CBcracker

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #25 on: August 05, 2013, 08:35:58 pm »
Will be interesting to see how 'Spark' refinement works out. 
Those Lots of 5 for $17.50 are ridiculous for a complete 'Atmel Atmega328P-AU' system when I paid $14 each like a sucker.  It shows the group at $3.50 each - and includes free shipping from China?

Sounds like you ordered a 328P module with an on-board USB-TTL converter; those go for ~$7.50.
If you need usb-ttl it would be cheaper to get a separate PL2303HX module ($1.81 @fasttech.com) and the basic $3.50 328P module.


defragster

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #26 on: August 06, 2013, 01:28:10 am »
Indeed USB included - very handy for starting.  Also my wife working on an Arduino library program is what rekindled my interest in 'these type' of things.  In that scenario having USB and ease of use critical.  But a low enough cost solution might allow participants to take one home

jaghvi

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #27 on: August 26, 2013, 03:00:59 am »

Bluebie

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Re: a smaller, cost-reduced digispark (<$1)
« Reply #28 on: August 26, 2013, 03:24:33 am »
Woah! Rad!!